The following information is also available:
Here is in index of the event files for each instrument:| S0_STAH1= | 6 | / S0 area discrimination H start addr for ccd 1 |
| S0_EVTR1= | 100 | / S0 event threshold for ccd 1 |
| S0_STAH1= | 6 | / S0 area discrimination H start addr for ccd 1 |
| S0_EVTR1= | 102 | / S0 event threshold for ccd 1 |
| S0_STAH1= | 96 | / S0 area discrimination H start addr for ccd 1 |
| S0_EVTR1= | 100 | / S0 event threshold for ccd 1 |
| S0_STAH1= | 6 | / S0 area discrimination H start addr for ccd 1 |
| S0_EVTR1= | 100 | / S0 event threshold for ccd 1 |
| S0_STAH1= | 6 | / S0 area discrimination H start addr for ccd 1 |
| S0_EVTR1= | 100 | / S0 event threshold for ccd 1 |
| S0_STAH1= | 6 | / S0 area discrimination H start addr for ccd 1 |
| S0_EVTR1= | 102 | / S0 event threshold for ccd 1 |
| S0_STAH1= | 96 | / S0 area discrimination H start addr for ccd 1 |
| S0_EVTR1= | 100 | / S0 event threshold for ccd 1 |
| S0_STAH1= | 6 | / S0 area discrimination H start addr for ccd 1 |
| S0_EVTR1= | 100 | / S0 event threshold for ccd 1 |
| S0_STAH1= | 6 | / S0 area discrimination H start addr for ccd 1 |
| S0_EVTR1= | 100 | / S0 event threshold for ccd 1 |
| S0_STAH1= | 6 | / S0 area discrimination H start addr for ccd 1 |
| S0_EVTR1= | 102 | / S0 event threshold for ccd 1 |
| S0_STAH1= | 96 | / S0 area discrimination H start addr for ccd 1 |
| S0_EVTR1= | 100 | / S0 event threshold for ccd 1 |
| S0_STAH1= | 6 | / S0 area discrimination H start addr for ccd 1 |
| S0_EVTR1= | 100 | / S0 event threshold for ccd 1 |
| CPU2= | RUN | / CPU2 run/stop |
| CPU3= | RUN | / CPU3 run/stop |
| CPU2= | STOP | / CPU2 run/stop |
| CPU3= | STOP | / CPU3 run/stop |
| CPU2= | RUN | / CPU2 run/stop |
| CPU3= | RUN | / CPU3 run/stop |
| CPU2= | STOP | / CPU2 run/stop |
| CPU3= | STOP | / CPU3 run/stop |