The following information is also available:
Here is in index of the event files for each instrument:| S0_LVENA= | 0 | / S0 Level discrimination enable/disable |
| S0_LVENA= | 1 | / S0 Level discrimination enable/disable |
| S0_LVENA= | 0 | / S0 Level discrimination enable/disable |
| S0_LVENA= | 1 | / S0 Level discrimination enable/disable |
| S0_LVENA= | 0 | / S0 Level discrimination enable/disable |
| S0_LVENA= | 1 | / S0 Level discrimination enable/disable |
| S1_LVENA= | 0 | / S1 Level discrimination enable/disable |
| S1CCDPOW= | 0001 | / Which S1 CCDs are in use(0123): 0=OFF 1=ON |
| S1CCDLST= | 3 3 3 3 | / S1 CCD readout order |
| S1_LVENA= | 1 | / S1 Level discrimination enable/disable |
| S1CCDPOW= | 0100 | / Which S1 CCDs are in use(0123): 0=OFF 1=ON |
| S1CCDLST= | 1 1 1 1 | / S1 CCD readout order |
| S1_LVENA= | 0 | / S1 Level discrimination enable/disable |
| S1CCDPOW= | 0001 | / Which S1 CCDs are in use(0123): 0=OFF 1=ON |
| S1CCDLST= | 3 3 3 3 | / S1 CCD readout order |
| S1_LVENA= | 1 | / S1 Level discrimination enable/disable |
| S1CCDPOW= | 0100 | / Which S1 CCDs are in use(0123): 0=OFF 1=ON |
| S1CCDLST= | 1 1 1 1 | / S1 CCD readout order |
| S1_LVENA= | 0 | / S1 Level discrimination enable/disable |
| S1CCDPOW= | 0001 | / Which S1 CCDs are in use(0123): 0=OFF 1=ON |
| S1CCDLST= | 3 3 3 3 | / S1 CCD readout order |
| S1_LVENA= | 1 | / S1 Level discrimination enable/disable |
| S1CCDPOW= | 0100 | / Which S1 CCDs are in use(0123): 0=OFF 1=ON |
| S1CCDLST= | 1 1 1 1 | / S1 CCD readout order |
| CPU2= | RUN | / CPU2 run/stop |
| CPU3= | RUN | / CPU3 run/stop |
| CPU2= | STOP | / CPU2 run/stop |
| CPU3= | STOP | / CPU3 run/stop |
| CPU2= | RUN | / CPU2 run/stop |
| CPU3= | RUN | / CPU3 run/stop |
| CPU2= | STOP | / CPU2 run/stop |
| CPU3= | STOP | / CPU3 run/stop |